The present invention relates to semiconductor devices and their fabrication, and more particularly to forming bases and emitters of bipolar transistors in BiCMOS integrated circuits.
BiCMOS technology combines bipolar and MOS transistors in the same integrated circuit thus combining both the high speed advantage of the bipolar transistors and the high packing density advantage of the MOS technology. However, BiCMOS fabrication processes are typically more complex and have more steps than either bipolar or MOS processes. Additional high temperature steps of BiCMOS processes cause dopant diffusion from transistor regions, enlarging the bipolar transistor dimensions such as the base width and hence making the transistors slower. Further, etch steps may require a different amount of overetch for the bipolar and MOS transistors, and selecting the longest overetch as required by one group of transistors (for example, the bipolar transistors) may damage the other group of transistors (the MOS transistors in this example), reducing the yield. Thus, there is a need for a BiCMOS process that reduces dopant diffusion in the bipolar transistors and reduces the damage due to unequal overetch requirements for the bipolar and MOS transistors.